High speed Designs - Part 22 (Signal Integrity issues we see from the manufacturing side)

High speed Designs - Part 22 (Signal Integrity issues we see from the manufacturing side)

Designers might have taken all the care (performing simulations, multiple reviews) while designing the circuit, PCB, it is the manufacturing and assembly that also plays a role in performance. Especially, high speed designs might have multiple issues in this case.

  • Losses in the PCB, Propagation delay, impedance are very important parameters in high speed design. If the dielectric material used has wide tolerances, it effects the performance. Especially, when the PCB is produced by different FAB houses, this is commonly faced issue.
  • While impedance control is done while routing the PCB, it is the tolerance w.r.t trace width followed by FAB houses determines the accuracy
  • It is commonly observed scenario that there are tolerances w.r.t stack up, higher the variation, more the change in impedance.
  • Solder mask thickness may not be the same in all cases and this also causes impedance variation
  • Another major problem with high speed designs is the coupling, if the spacing between the traces is not as expected and there are tolerances, this might cause unintentional coupling in the PCB
This is where the test coupons play a crucial role. Whether it be first build or a production build, it is good to have test coupons to verify the losses.

So, having a good FAB note helps in this case? Yes, in most cases. It is important that we specify few things in FAB note
  • Specify alternate materials if a specific material is not available. Ensure that we performed simulations with the same
  • Provide tolerance for impedance
  • Provide tolerance for the stack up

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