To start with let us consider an example of crystal connected to Microcontroller. A designer can easily design the external capacitors required to be connected to crystal, in order to match the load capacitance of crystal. However, the big miss here is that the trace connecting the external capacitors also has some capacitance to ground. This is called the parasitic capacitance and this is an assumption depending the trace lengths and distance from trace to ground. While there are calculators and simple formulae available for calculating such capacitance, this is all theoretical and the practical value on the PCB is going to vary. Most designers consider this as between 3pF to 5pF and go ahead with the calculations. One simple reason is that this may be good assumption as crystals and respective components are placed close to the controller.
The skill of a hardware engineer is to design any electrical circuit to meet it's functionality. This involves using calculations, simulations, etc. But estimating a stray capacitance is always a challenge. There are many chances that they are not taken into consideration in most scenarios and design failing during testing. If you are designing a chip, if you are designing a PCB, if you are testing with a probe you have to deal with this stray capacitance. Stray capacitance due to it's existence can lead designer to a misjudgment and there by making unnecessary changes to the design which actually are not needed.
Let us see some scenarios where stray or parasitic capacitance can trouble engineers:
- Stray capacitance of MOSFET
- Stray capacitance of a PCB trace involving high speed design
- Stray capacitance in a cable
- Stray capacitance of probe tip to ground
- Stray capacitance associated with passive components
- Stray capacitance with heat sinks to case of devices on which it is used
- Parasitic capacitance associated with operational amplifier
The high frequency performance of PCB, devices is always a concern with parasitic capacitance.
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