High speed Designs - Part 7

High speed Designs - Part 7

Understanding the signal skew in high speed designs is very important. In high speed designs, most of them synchronous designs shall have clock and data signals. The data interpretation at the receiver end is dependent on the  data clocking at a specific edge. In DDR, this dependency becomes more complex where the  data need to be clocked on both rising and falling edge. While the modern day serial communication mechanisms have an embedded clock in the data rather than a separate clock signal, we shall restrict our discussion here to high speed designs with clock and data as separate signals. Skew is a fundamental performance limiting issue seen in the high speed designs. There shall be a time limit between the signals which decides the time within which the signals must arrive at the receiver so that receiver can reproduce the signal without any loss. This entirely depends on the below factors:
  • How long signals have been routed
  • Whether the signals have been length matched or not
  • Propagation delay of the signals which depends on the dielectric constant of PCB material
In practical scenario, one cannot achieve a Zero skew. So, we have to length match the traces to a best achievable tolerance to minimize the skew. One of the major disadvantage of skew is that band-width gets limited. For example, in SDRAM, the maximum skew among all the signals shall be less than +/-2.5% of the clock period driven by the controller. 

Let us assume a scenario where the PCB designer has defied all odds and perfectly matched the signals (Example: D+ and D- of USB). So, in this case can we expect a zero skew? The answer from an experienced designer who has seen the effects of the PCB in his design in "no way". The skew is not only dependent on the length but also the PCB over which these signals are routed. The major discussion point when PCB comes into consideration is the dielectric constant. Dielectric constant for example of an FR4 if claimed as 4.2 is not constant throughout the  board. This causes the signals to travel at different speeds on the PCB there by casing skew. The dielectric constant and propagation delay are related by the below formula:


Below is an example of skew seen in USB positive and negative signals, The negative signals must be an exact reverse of negative signal but it is seen little deviated from the actual. The affect of the deviation can be seen in the same figure where the signal is seen by the receiver has changed.

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