ibis models for signal intergrity

ibis models for signal intergrity


When an electronics designer starts working on initial designs, one uses simple formula for the discrete level calculations which involve capacitors, resistors and inductors. As he starts working on more designs and especially designs involving ICs, things out of designer hand and has to rely on the chip characteristics. Simple calculations doesn't work in these scenarios and designer has to depend on the IC models which help to characterize the electrical parameters of the chip. While we have heard about SPICE models, there are models like IBIS models which help to provide I/O level information of the ICs and are specifically used by the high speed designers in circuit simulations. 

IBIS stands for Input Output Buffer Information Specification. IBIS models contains some of the data you cannot find from reading a specific IC datasheet. As a designer, we can say that your quality of the simulation depends on the quality of the ibis model. And so your final PCB performance can be predicted to some extent only by a good ibis model. IBIS models follow Touchstone syntax specification which is a plain ASCII text format with syntax. Right now IBIS has v7.0 version as the latest. Download the v7.0 document from below link:


As the name indicates, the ibis models have the following information associated with them.
  • Each pin Resistance, Capacitance and Inductance
  • Resistance, Capacitance and Inductance of the IC Package
  • I-V specifications for the pin
  • Comments describing each specification (uses '|' as prefix to indicate comment)
Advantages of ibis models:
  • Faster in simulations
  • Simple file structure
  • Easy to understand
IBIS vs SPICE model:

SPICE model is a kind of netlist with parameters of all the components included. ibisis for a specific IC having all the I/O level information. In fact, IBIS data is extracted from SPICE analysis of the IC package.

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