Working on MSP432 - Part 7 (Low Power Mode - LPM3. 5)

Working on MSP432 - Part 7 (Low Power Mode - LPM3. 5)

We are trying to check how low a microcontroller can go in different sleep states. Here we are not performing any function in the microcontroller other than configuring it to a low power state.

When the MSP432 is set to LPM3.5 mode,

1. Supply is removed from the device for majority of the circuitry. CPU and all other peripherals are powered down.
2. Real Time Clock (RTC) module shall be available
3. Watchdog timer (WDT) module shall be available
4. Bank 0 of SRAM is in retention mode. All other banks of SRAM are powered down
5. Maximum input clock frequency of 32.768 KHz
6. LDO based operating mode at core voltage level 0
7. Flash memory is powered down

The above modules can be enabled or disabled by the user to further reduce the power consumption

Additionally,

1. All the unused I/O should be configured to Output mode
2. All the unused output pins are made to output as zero
3. All the unused output pins shall be left floating on the hardware board
4. On the evaluation board, ports P1.0, P2.0, P2.1, and P2.2 are connected to LEDs through a jumper. Remove the jumpers JP8, JP9, JP10, and JP11
5. Remove the debug interface jumpers for 5V, TXD, RXD, RST, TMS, TCK, TDO, TDI pins.
6. By default, the port function is General purpose, so, no need to configure them separately using commands like P0SEL0 = 0x00, P1SEL0 = 0x00, etc.

Below code has been framed satisfying the above points.

void main(void)
{

WDT_A->CTL = WDT_A_CTL_PW | WDT_A_CTL_HOLD;   // stop watchdog timer

ConfigureClock();

//disable ports - make as output and configure as 0 output
DisablePorts();

// Turn off PSS high-side & low-side supervisors
PSS->KEY = PSS_KEY_KEY_VAL;
PSS->CTL0 |= PSS_CTL0_SVSMHOFF;
PSS->KEY = 0;

//moving toLPM3.5 mode
PCM->CTL0 = PCM_CTL0_KEY_VAL | PCM_CTL0_LPMR__LPM35;
SCB->SCR |= SCB_SCR_SLEEPDEEP_Msk; // Set SLEEPDEEP
__DSB(); // Ensures SLEEPONEXIT is set
// immediately before sleep
__sleep();
__no_operation();

while(1)
{
}

}

void DisablePorts(void)
{
P1->OUT = 0x00; P1->DIR = 0xFF;
P2->OUT = 0x00; P2->DIR = 0xFF;
P3->OUT = 0x00; P3->DIR = 0xFF;
P4->OUT = 0x00; P4->DIR = 0xFF;
P5->OUT = 0x00; P5->DIR = 0xFF;
P6->OUT = 0x00; P6->DIR = 0xFF;
P7->OUT = 0x00; P7->DIR = 0xFF;
P8->OUT = 0x00; P8->DIR = 0xFF;
P9->OUT = 0x00; P9->DIR = 0xFF;
P10->OUT = 0x00; P10->DIR = 0xFF;
PJ->OUT = 0x00; PJ->DIR = 0xFF;
}

void ConfigureClock(void)
{
CS->KEY = CS_KEY_VAL;    // Unlock CS module for register access

// Initialize LFXT1 (Low Frequency 32.768KHz Clock)
PJ->SEL0 |= BIT0 | BIT1;         // Select for LFXT ports for the external clock connection
CS->CTL2 |= CS_CTL2_LFXT_EN;     // LFXT on

// Loop until XT1, XT2 & DCO fault flag is cleared
do
{
// Clear XT2,XT1,DCO fault flags
CS->CLRIFG |= CS_CLRIFG_CLR_DCOR_OPNIFG | CS_CLRIFG_CLR_HFXTIFG |
      CS_CLRIFG_CLR_LFXTIFG | CS_CLRIFG_CLR_FCNTLFIFG;
SYSCTL->NMI_CTLSTAT &= ~ SYSCTL_NMI_CTLSTAT_CS_SRC;
    } while ((SYSCTL->NMI_CTLSTAT | SYSCTL_NMI_CTLSTAT_CS_FLG)
         && (CS->IFG & CS_IFG_LFXTIFG)); // Test oscillator fault flag (in case 32.768KHz not present)

// Select ACLK as LFXTCLK (32.768KHz)
CS->CTL1 &= ~(CS_CTL1_SELA_MASK) | CS_CTL1_SELA_0;
CS->KEY = 0;
}

With the above code, the current consumption mentioned in the datasheet for the LPM3.5 mode is almost been achieved. 





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