PCB Layout Engineer - Interview Questions - 1

PCB Layout Engineer - Interview Questions - 1

The questions included are just an indicators to the PCB Design engineer for helping him to prepare his interview. The list includes questions for beginner level to the most advanced level. The list is to enable the depth of questions you can face as a PCB Design Engineer.

1. What is the most critical board design you have worked on?
2. when is DRC check done on the PCB?
3. What are all the DRC checks you perform on the PCB?
4. What are all the PCB design tools you have worked on?
5. what are all the inputs required for a PCB design engineer to start his work?
6. Explain a 8-layer stack up
7. Who decides the stack up in your organization?
8. How do you come up with layer stack up for a given PCB design?
9. How do you determine the PCB material to be used for the fabrication?
10. What is the process to create a footprint?
11. What is the IPC standard followed in the footprint creation?
12. what is the minimum pitch BGA routing you have worked with?
13. what is blind via?
14. what is buried via?
15. What is Ratsnest in PCB Layout terminology?
16. Have you performed thermal analysis on your PCB?
17. what are the different PCB file extensions you are familiar with?
18. How do you ensure that your PCB exactly fit into the mechanicals?
19. Is silkscreen outline a must in PCB Layout? How does this help?
20. what is the need for fiducials on the PCB?
21. what are the instructions a PCB Design engineer provide to manufacturing/fabrication house?
22. What are the different types of fiducials on the PCB?
23. How do your determine via size in a PCB?
24. what does the term fanout mean in PCB terminology?
25. what are the guidelines you follow for routing a clock signal on a PCB?
26. what are the guidelines you follow while placing the power section of the PCB?
27. Can you place a right angled connector inside the PCB rather than at the edge?
28. How do you place the decoupling capacitor which is connected to a power line for a IC?
29. what are the routing guidelines you follow on a board which has analog and digital signals?
30. what are .stp files?
31. What is the sequence followed while starting a PCB Layout activity?
32. Define Skin depth
33. How do you calculate the characteristic impedance for a signal?
34. Define characteristic impedance?
35. what is the difference between impedance and resistance?
36. what are the routing guidelines to be followed for current sense resistor?
37. How is track length and impedance related?
38. How is track width and impedance related?
39. Give few guidleines for placing the crystal oscillator used for prociding clock to microcontroller.
40. what are the various package types for which you have created footprints?
41. what is the biggest mistake you have done in the PCB routing?
42. What is the purpose of Valor tool?
43. How do you calculate the Trace impedance?
44. How do you calculate the trace impedance of a already farbicated board?
45. what is the use of common mode choke in the PCB?
46. what are the routing guidelines for routing ethernet signals?
47. If a series termiantion is used in the design, where do you place the termination?
48. what is the best termination technique to be used for clock signal? 
49. Hardware design engineer has given a PCB to you for routing. You have started the activity. what would be the value addition to the hardware design engineer from your side?
50. What is the use of stitching capacitor?
51. What is the process followed during the PCB fabrication?
52. A LED is present in the design and how as a PCB design engineer you ensure good palcement such that design engineer and aseembly house benefit?
53. what are press fit connectors?
54. There is a 20-pin connector on the board. 4 pins are 5V and 6 pins are GND. The total power input to the board is 150W. what are all the routing guidelines you follow to ensure proper board functionality?
55. What specification of the given IC from the datasheet helps thermal analysis of that part?
56. what is the difference between operating and storage temeprature?
57. why characteristic impedance reduces with increses in trace width?
58. Why does signal reflection occur in a PCB?
59. what do you mean by termination on the board?
60. Can you define cross talk?
61. Does analog effect digital signals or digital signals effect analog signals?
62. what are the generic criteria to be followed during high speed board designs?
63. How can say that a signal is high speed signal?
64. What is the definition of characteristic impedance?
65. What is the dielectric constant of a FR4 material?
66. For suppose, you are working on a high speed design board which has PCIe lines, Ether net lines and DDR, what is the PCB material you would propose?
67. Provide any 3 inputs to arrest the EMI that can arise out of the board?
68. What is PDN in a PCB layout terminology?
69. What is the difference between loosely coupled and tightly coupled differential lines? Where do you use them?
70. What is the difference between DFT and DFM?
71. Why is lenght matching essential in a PCB?
72. Give any few tips to maintain integrity of a signal on a PCB?
73. What is the length matching requirement for PCIe 2.0 signals?
74. How do you determine the spacing between the signal and reference plane in a PCB stack up?
75. If you have to route a signal of curernt capaibility of 12A, what are the steps you follow for routing this signal?
76. What is propogation delay?
77. Whcih topology has more propogation delay? Stri-pline or microstrip?
78. Draw the structure of stripline.
79. which topology do you use for clock routing, stripline or microstripline?
80. What are the difefrrent types of cross talks on PCB?
81. whay does cross talk happen on a PCB?
82. why does ringing occur on the signals?
83. Why differential signalling is preffred for high speed signals?
84. What is common mode noise nd differential mode noise?
85. Why does conducted EMI occur in a PCB?
86. Hardware design engineer has come back to you saying that the board has failed in EMI/EMC test? How do you start debugging the board to find potential issues with layout?
87. Let us assume there are several ICs placed on the board. What is the best method to have a minimal PCB ground impedance?
88. What are current/ground loops in a PCB layout?

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